Any Plans for Ogre 2.0 AVX Support?

[ibanez101]

So I have seen through the slides posted by Matias for memory management that the more mainstream approach to bringing ogre3d's core to the modern age has been to align on the use of the SSE intruction set for SIMD operations.
Was wondering what are if any plans to support the AVX instruction set as it doubles the effective vector width of SSE.
Since Jaguar is the baseline of both current gen consoles and Jaguar has support for AVX along with Sandy Bridge processors forward for Intel, the ability to take advantage of these instructions will be fairly wide spread.

Any thoughts on this? In general, code compression and doubling data throughput per instruction sounds like a good idea . The only new constraint would be aligning the memory manager to 32 byte instead of 16 byte.

[dark_sylinc]

The architecture to do that is already set.

The folder structure in Math/Array/SSE2 would require to change to Math/Array/AVX; plus tweaking a few macros.
In fact David ported the SSE2 code to NEON in less than a week.

We're now focusing on other areas; since we gained a lot already on what could be improved using SIMD, and we're now hitting memory bandwidth barriers (though PS4 & XBox One seem to have a lot of BW) thus making the pursue of ALU solutions like AVX less atractive (vs other higher priority issues).

Perhaps another big reason AVX isn't set yet is that I (Ogre 2.0's main dev) do not own an AVX capable machine

But everything was laid down to make any transition as smooth as possible and as quickly as it can be. An AVX port made on request could be made in surprisingly little time.

[ibanez101]

Ok let me know if you need a machine to add to the benchmarking options for an AVX flavor. I could even try to do some of the work to tweak a Math/Array/AVX option and test it since you know the work is fairly trivial.

My current config is:
i7 4770k haswell
16GB RAM
GTX670

Last I saw was that you had one of the core 2 based quad core processors. I think the community here should set up a paypal donation for you to jump to a haswell.

[masterfalcon]

dark_sylinc is right, it's actually pretty straight forward, though daunting, to port the code to another SIMD language. But most of us are lacking hardware to test on.

EDIT: Let me correct that, apparently I do. It doesn't support AVX 1.1 or 2 but just plain original AVX. Perhaps I'll have a new task to take on?

[c6burns]

Last I saw was that you had one of the core 2 based quad core processors. I think the community here should set up a paypal donation for you to jump to a haswell.

It can be hard for some devs to ask for money without feeling greedy, or hard to manage the funds of an OSS team without a treasurer of sorts... and Ogre may have policies about this already of which I am not aware. But I just wanted to say I'd certainly kick in if the Ogre project were accepting donations. Sorry to derail ... back to AVX

[spacegaier]

But I just wanted to say I'd certainly kick in if the Ogre project were accepting donations.

FYI: We ARE accepting donations, always have: http://www.ogre3d.org/donations

And that "treasurer of sorts" is me .

[masterfalcon]

Just to let people know, I started on AVX support last night. Just plain old AVX for now. Not 1.1 or the 512 bit extensions.

[ibanez101]

Yeah I wouldn't worry about the 512 extensions for a while since they won't appear until skylake time frame for intel (according to wikipedia). As long as none of the currently slated SIMD operations in OGRE 2.0 are planning to use gather instructions, you should be safe with the current AVX version vs. what is already supported floating point wise for SSE.

[masterfalcon]

I just got OgreMain compiling and linking with AVX support but I have not yet tested it. I did run into one issue that I did not expect. AVX doesn't have the same level of integer support as even SSE2. AVX2 does, but that doesn't appear to be supported on current gen consoles. I don't know the history of it but that seems like an odd decision.

[ibanez101]

Yeah from the software standpoint it seems like a weird chain of events. I think it may have to do with the amount of feature addition that intel / amd feel they can safely make on a per micro architecture timeline. The integer support does take a re-work of the integer register file / integer unit data path so taking the ISA in pieces might have been an easier pill to swallow. And I believe they did something similar with SSE integer support so wouldn't want to break tradition .

[maiakaat]

I'd delay an AVX fully capable machine until 2014 end, and pick up/setup donations for a Xeon E3/E5 V3 (or equivalent i7) system with a new DirectX/OpenGL card when DX12 comes out, that way the Ogre team can look at multiple new areas with a single upgrade

It's what I am going to do, plus refurbed workstations will be much cheaper by then